1. Field of the Invention
The present invention relates to a fabrication method for a chip size semiconductor package (CSP), and in particular to an improved fabrication method for forming a CSP package by directly bonding conductive wires on bonding pads formed on a semiconductor chip.
2. Description of the Conventional Art
FIGS. 1A to 1F sequentially illustrate a conventional CPS fabrication method.
First, as shown in FIG. 1A, a semiconductor chip (or a wafer) 11 is provided with a plurality of bonding pads 13, and a passivation layer 15 is formed on the surface of the semiconductor chip 11, excluding the bonding pads 13. Next, as shown in FIG. 1B, a first conductive layer 17 of TiW and a second conductive layer 19 of Au are sputtered and sequentially deposited on the bonding pads 13 and passivation layer 15. And, as shown in FIG. 1C, one end of a conductive wire 21 made of a material such as Au is bonded to a part of the second conductive layer 19 formed on each of the bonding pads 13 and the conductive wire 21 is cut to a length of 1-2 mm, and thus the conductive wire 21 is formed straight or curved. The second conductive layer 19 is used as a common terminal in a subsequent electroplating process. Then, as shown in FIG. 1D, a photo resist 23 is deposited on the second conductive layer 19 excluding the parts under which the bonding pads 13 are formed. As shown in FIG. 1E, in order to strengthen the conductive wire 21, Ni plating material is coated on the outer surface of the conductive wire 21. And then, as shown in FIG. 1F, Au material 27 is plated on the surface of the Ni plated conductive wire 21. The Au plating 27 improves an electrical solder joint between the conductive wire 21 and a printed circuit board and prevents the conductive wire 21 from being corroded when mounting the CSP on the printed circuit board. Here, electroplating is used for plating the Au and Ni. Lastly, after the photo resist 23 is removed, the first and second conductive layers 17 and 19 except where each bonding pad 13 is formed are removed by etching.
As described above, the conventional CSP fabrication method requires the sputtering, photo resist deposition, and etching applied for strengthening the conductive wire 21, improving solder ability, and preventing the corrosion of the conductive wire 21, which are all highly difficult and costly in performing. In addition, moisture penetrates through the connecting surface between the semiconductor chip 11 and the conductive wire 21, and the surface of the semiconductor chip 11 is externally exposed (when completely formed as CSP), thereby being unable to endure a strong external mechanical impact.